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首页设计与方案CD74HCT174E_TI(德州仪器)中文资料_英文资料_价格_PDF手册
CD74HCT174E_TI(德州仪器)中文资料_英文资料_价格_PDF手册
2024-06-17 14:00:52
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CD74HCT174E

具有复位功能的高速 CMOS 逻辑六路 D 型触发器

 


 

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Features

 

• Buffered Positive Edge Triggered Clock

• Asynchronous Common Reset

• Fanout (Over Temperature Range)

- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads

- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads

• Wide Operating Temperature Range . . . -55oC to 125oC

• Balanced Propagation Delay and Transition Times

• Significant Power Reduction Compared to LSTTL Logic ICs

• HC Types

- 2V to 6V Operation

- High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V

• HCT Types

- 4.5V to 5.5V Operation

- Direct LSTTL Input Logic Compatibility, VIL= 0.8V (Max), VIH = 2V (Min)

- CMOS Input Compatibility, Il ≤ 1µA at VOL, VOH

 

 

                                                                     


 

Description

 

The ’HC174 and ’HCT174 are edge triggered flip-flops which utilize silicon gate CMOS circuitry to implement D-type flipflops. They possess low power and speeds comparable to low power Schottky TTL circuits. The devices contain six masterslave flip-flops with a common clock and common reset. Data on the D input having the specified setup and holdtimes is transferred to the Q output on the low to high transition of the CLOCK input. The MR input, when low, sets all outputs to a low state.

 

Each output can drive ten low power Schottky TTL equivalent loads. The ’HCT174 is functional as well as, pin compatible to the ’LS174.


                     


CD74HCT174E 具有复位功能的高速 CMOS 逻辑六路 D 型触发器