THS7530EVM

EVAL MODULE FOR THS7530

This user's guide describes the characteristics, operation, and use of the THS7530EVM. This evaluation module (EVM) is a demonstration fixture for the THS7530 wideband, fully differential, variable-gain amplifier, and provides 50-Ω input and output termination for easy evaluation with common 50-Ω test equipment. A complete circuit description, schematic diagram, and bill of materials are included.

1 Description

Thissectiongivesageneraldescriptionof theTHS7530EVM.

1.1 GeneralDescription

TheTHS7530isadc-coupledwidebandwidthamplifierwithvoltage-controlledgain.Theamplifierhas highimpedancedifferential inputsandlowimpedancedifferentialoutputswithhighbandwidthgaincontrol, outputcommonmodecontrol,andoutputvoltageclamping. It ispackagedina14-pinPWPPowerPAD™ package.Theschematicof theTHS7530EVM,asfurnished, isshowninFigure1.

1.2 BoardDescription

• Power input:+5VDC at+VCC (J1), testpointTP1

• Commonreference:GND(J2), testpointTP2andTP4

• Signal input: IN+(J3)

• Signaloutput:OUT–(J4)

• Gaincontrol:Gain(R2), testpointTP3

• Highclampvoltage:VCL+(R21), testpointTP8

• Lowclampvoltage:VCL–(R22), testpointTP9

• Outputcommon-modevoltage:VOCM(R23), testpointTP10

•Powerdown:SHD(JP1)openfornormaloperation(pinlabeledPDinthedatasheet).

2 THS7530EVM

Design This section discusses general design considerations for theTHS7530EVM.

2.1 General Design Considerations

The THS7530 is designed for nominal 5-V power supply from VS+ to VS .

The amplifier has fully differential inputs, VIN+ and VIN , and fully differential outputs, VOUT+ and VOUT–. The inputs are high impedance and outputs are low impedance. External resistors are required for impedance matching and termination purposes.

For best performance, the input and output common-mode voltage should be maintained at the midpoint between VS+ and VS . The output common-mode voltage is controlled by the voltage applied to VOCM. If left unconnected, VOCM is set at mid-rail by internal resistors. The input common-mode voltage must be set by external means.

Voltage applied from VG to VG+ controls the gain of the part with 38.8 dB/V gain compliance. The input can be differential or single-ended. VG must be maintained within ±0.8 V of VS .

VCL+ and VCL– are inputs that limit the output voltage swing of the amplifier. The voltages applied set an absolute limit on the voltages at the output.

PD input controls the power down feature of the part. A TTL low puts the part into power savings mode, and a high or unconnected input puts the part in normal operating mode.

Power supply bypass capacitors are required for proper operation. A 6.8-mF tantalum bulk capacitor is recommended if the amplifier is located far from the power supply and may be shared among other devices. A ceramic 0.1-mF capacitor is recommended within 0.1 in (0,254 cm) of the device power pin. The ceramic capacitor should be located on the same layer as the amplifier to eliminate the use of vias between the capacitors and the power pin if possible.

2.2 OtherCircuits

Figure2throughFigure5showsomedifferentvariationsofcircuitconfigurationsthatcanbebuiltby modifyingtheEVM.

3 EVMSchematicandBillofMaterials

Thissectionprovidesacompleteschematicdiagram,boardlayouts,andbillofmaterialsforthe THS7530EVM.

3.1 CompleteEVMSchematic

Figure6showsthecompleteEVMschematic.ThetwoPCBlayersareillustratedinFigure7.