TAS5624ADDVEVM

This user’s guide provides specifications for the evaluation module (EVM) for TAS5622 and TAS5624 Digital Input Class-D Power Stages with the TAS5558 Digital Audio Processor with PWM Output from Texas Instruments. The user’s guide also describes operation of the EVM and provides design information including schematic, bill of materials, and PCB layout.

1 Introduction

The TAS5622-TAS5624DDVEVM PurePath™ EVM demonstrates the current version of TAS5622DDV or TAS5624DDV integrated circuit power stage with TAS5558DGG from Texas Instruments (TI).

The TAS5622 and TAS5624 are high-performance, integrated Stereo Feedback Digital Amplifier Power Stages designed to drive 3Ω speakers at up to 200W per channel for TAS5624DDV and 165W per channel for TAS5622DDV. They require only a passive demodulation filter to deliver efficient high quality audio amplification.

TAS5558DGG is a high performance 32 bit (24 bit input) multi channel PurePath™ Digital Pulse Width Modulator (PWM) with fully symmetrical AD modulation scheme. The device also has Digital Audio Processing (DAP) that provides 48 bit signal processing, advanced performance and a high level of system integration.

This EVM can be configured as 2 BTL channels for stereo evaluation or 1 PBTL (parallel BTL) channel for subwoofer evaluation. Together with a TI Input-USB Board 3, it provides a complete stereo digital audio amplifier system which includes digital input (S/PDIF), analog inputs, interface to PC and DAP features like digital volume control, input and output mixers, automute, tone controls, loudness, EQ filters and dynamic range compression (DRC). There are configuration options for power stage failure protection.

TAS5622-TAS5624DDVEVM Features

• Stereo PurePath Digital™ evaluation module.

• Self-contained protection system (overcurrent, overtemperature, undervoltage and missing PWM input).

• Standard I 2S and I 2C / Control connector for TI input board

• Double-sided plated-through PCB layout.

2 Quick Setup Guide

This section describes the TAS5622-TAS5624DDVEVM power supplies and system interfaces. It provides information regarding handling and unpacking, absolute operating conditions, and switch and jumper positions. It also provides a step-by-step guide to setting up the TAS5622-TAS5624DDVEVM for device evaluation.

2.1 Electrostatic Discharge Warning

Many of the components of the TAS5622-TAS5624DDVEVM are susceptible to damage by electrostatic discharge (ESD). Customers are advised to observe proper ESD handling precautions when unpacking and handling the EVM, including the use of a grounded wrist strap at an approved ESD workstation.

Unpacking the EVM

Upon opening the TAS5622-TAS5624DDVEVM package, check to make sure that the following items are included:

• 1 pc. TAS5622-TAS5624DDVEVM using 1 TAS5558DGG and 1 TAS5622DDV or TAS5624DDV.

• 1 pc. TI Input-USB Board 3 for interfacing TAS5622-TAS5624DDVEVM to SPDIF/analog sources and PC for control.

• 1 pc. Signal and Control Interface IDC cable for connection to an I 2S front-end like the Input-USB Board 3.

• 1 pc. Cable for connecting Input-USB Board 3 to a USB port on a PC for TAS5558 control by software.

• If any of these items are missing, contact the nearest Texas Instruments Product Information Center to inquire about a replacement.

Connect the Input-USB Board 3 to the TAS5622/14LDDVEVM using the delivered IDC cable.

Power Supply Setup

2 power supplies are needed to power the TAS5622-TAS5624DDVEVM. Voltage and current requirements for the PVDD power supply are shown in the table below. Connect this power supply to the EVM using banana cables or wires secured to the power supply binding posts PVDD and GND. A second power supply, 12Vdc at 500mA, is required to power Input-USB Board 3. Connect the 12V power supply to the Input-USB Board 3 using banana cables or wires secured to the power supply binding posts +12V and GND.

Output Configuration BTL and PBTL

When changing mode from BTL to PBTL, make sure that the AMP_RESET switch is set to RESET before changing shunts on Mode headers M3, D and C.

- For BTL mode place a shunt on pins 1 and 2 of each header, at the positions marked BTL.

- For PBTL mode place a shunt on pins 3 and 2 of each header, at the positions marked PBTL.